Schaeffler Aids Wave-Energy Converter Development

Working with Pelamis wave power, Schaeffler has enabled a breakthrough in the design of the next generation of renewable wave-energy converters. The 'P2' design is said to be more efficient and cost effective than its predecessors. The main tube structures are connected by the main bearings units, which use a combination of Schaeffler bearings, and there are four hydraulic rams at each main joint, pivoting on precision bearing arrangements.

Key to the success of the joint concept was a low-friction material designed and developed by Schaeffler. This modified PTFE fabric liner is part of the Elgoglide range, with low-friction characteristics that have effectively eliminated 'stick slip'. This has allowed the operating envelope of the machine to be extended beyond the capabilities allowed by standard bearing materials, according to the company.

Tensilica Enhances Software Development Tools

Tensilica has announced its eighth-generation tools that further automate customised Xtensa dataplane processor (DPU) design and speed software development. Improvements cover improved compiler technology, better multi-core system simulation and profiling, an upgraded integrated development environment (IDE) and pin-level co-simulation with RTL. 'In the dataplane - as opposed to the control plane - our DPUs have to deal with intensive data processing workloads and direct interconnection to hardware blocks,' said Steve Roddy, Tensilica's vice-president of marketing and business development.

'With this eighth-generation tool set, we've concentrated on improvements that make it easier for designers to use customised DPUs to perform these data-intensive tasks, bringing programmability, enhanced debugging and post-silicon software upgradability to signal processing and other dataplane functions previously handled in dedicated hardware blocks,' he added. Tensilica's compiler now supports operator overloading on custom data types in the C programming language, without any of the overhead that is often associated with it.

The compiler also now displays custom data types in their natural format for faster debugging. Tensilica is known for its ability to let designers add custom instructions and data types to its processors to improve performance. If an application needs to work on 56-bit data, a designer can now define a custom 56-bit data type with a single line of code. The designer can also specify what regular C operators, such as '+' and '*', should do when using this data type. The overloading is always done with zero overhead so the resulting binaries are most efficient.

Porting and creating C application code that uses custom data types is now easier as standard C operator syntax can be used. This makes the code easier to read and allows porting via changes in the C header files rather than throughout all of the source code itself. User-defined display formatting (UDDF) provides a means to display non-integer data types (such as fixed point and vectors) in a more natural and readable way that makes debugging issues faster. Custom data types that are pre-defined in Tensilica's audio and communications DSPs, such as Hi-Fi and ConnX D2, already have overloading definitions and pre-defined UDDFs.

Tensilica now allows designers to program, simulate and profile a simple shared memory subsystem for heterogeneous cores quickly within the Xtensa Xplorer IDE. The memory partitioning for each core and the shared memory is simplified by specifying them in the subsystem wizard. With a subsystem defined, it can be simulated and profiled within the IDE for initial assessment of hardware and software partitioning using side-by-side profile comparisons. To aid the designer in dealing with shared memory systems, Tensilica provides a synchronisation library in C source form with primitives for locks, barriers and semaphores.

With this library, up to six months of development and bug fixing can be avoided for designers who are new to shared memory systems. Tensilica has made several improvements to its Xtensa Xplorer IDE so designers now have an upgraded IDE platform (Eclipse 3.3, CDT 4.0) as well as faster simulation speeds and more efficient debugging. The company has also strengthened its simulation capability with the introduction of a link between its pipeline-accurate, cycle-accurate Xtensa Instruction Set Simulator (ISS) and the Verilog simulators. Designers can now run pin-level accurate System-C simulations of Tensilica DPUs in their native Verilog simulators.

P4ELA Platform Aids Industrial-System Development

Commell has brought out the Industrial Micro ATX motherboard P4ELA. The P4ELA incorporates an Intel LGA775 pin-out compatible with: Intel Core 2 Quad processor Q9400; Intel Core 2 Duo processors E8400, E7400, E6400 and E4300; Intel Dual-Core processors E5300 and E2160; and Intel Celeron processor 440 at 1333/1066/800MHz system bus. The P4ELA platform is based on the Q45 Express chipset.

It is ideal for developing high-performance systems for industrial workstation, industrial control and automation, retail and hospitality, gaming, print imaging, digital signage, digital surveillance and network-security applications. The P4ELA mainboard has a built-in Intel Graphics Accelerator 4500 to deliver an excellent blend of graphics performance and features and support for Microsoft DirectX 10 and OpenGL 2.0, enabling support for the highest levels of Windows Vista experience.

The graphic memory controller hub incorporates an updated backbone architecture that optimises available bandwidth with the 1333MHz system bus. The mainboard also supports Intel Matrix Storage Technology (MST), provides quicker access to applications and data files with RAID 0 and 10, and greater data-protection against a hard-disk drive failure with RAID 1, 5 and 10. Commell's P4ELA supports DDR3 DIMM up to 8GB and comes with PS/2 keyboard and mouse, five RS232Cs and one RS232/422/485.

Networking is provided by two Intel 82574L Giga LANs, eight USB2.0 ports, HD audio and six SATA2 interfaces. It also includes the following expansion slots: one ISA, two PCIs and one Mini PCI, one PCI-E 4X and one PCI-E 16X.

WorkNC Software Plays Role In Vehicle Development

Sescoi's WorkNC CAM/CAD software is helping in the design and development of a vehicle concept that addresses traffic congestion and the overall CO2 impact produced during the lifecycle of a car. Designed and developed in the UK by Gordon Murray Design, which is based in Shalford, Surrey, the T.25 City Car and the Istream manufacturing process started from an idea first conceived by Gordon Murray in 1993.

Gordon Murray, who formed the company, designed a series of Brabham Formula 1 (F1) racing cars that enabled Nelson Piquet to win the world championship in 1981 and 1983. Within two years of moving to McLaren as technical director, his Honda-powered McLaren had won 15 out of 16 grand-prix races and gave Ayrton Senna his first driver's championship. Subsequently, as head of McLaren Cars, he designed road-going supercars - the McLaren F1 and the Mercedes-Benz SLR McLaren - before forming Gordon Murray Design in 2007.

The key design elements for the T.25 and the Istream are for a very small vehicle that protects personal mobility, that is economical and safe to own, that is fun and stylish to drive and that has a low lifecycle carbon footprint. To achieve these aims and to make the car as spacious as possible inside required considerable effort on vehicle packaging, with many design iterations. This was further complicated by the principles of Istream, which demanded the flat packing of the vehicle for transportation, ready for final assembly in end-user markets.

Jon Ingleby, prototyping applications manager, uses WorkNC to produce the body panels for the styling studio model as well as for the seating buck, which is used to evaluate the space inside the vehicle. Machining the models and moulds, which can be full size, is carried out using the company's ITP overhead gantry CNC mill. He said: 'We have a wide range of responsibilities in the design studio so the software's ease of use is very important to us. 'WorkNC is sometimes not used for a few weeks, but because it is so simple to operate we can jump onto it again and start programming immediately,' added Ingleby.

A range of rapid-prototyping methods is used in the styling studio, including conventional pattern making, fused deposition modelling, CNC milling and composite panel production. To compress development times, engineers need to be skilled in all these areas and have the means of working on several tasks simultaneously. Ingleby added: 'There are three cycles of body design during the vehicle development program, from wind-tunnel models to a full-size model, which we can machine on the ITP gantry mill using 3+2 machining techniques.

'In WorkNC, it takes about one to two hours to program the roughing toolpaths and, while cutting is under way, we program the finishing paths,' he said. Gordon Murray Design uses Catia V5 to model the T.25. 'A'-class surfaces are imported into WorkNC ready for machining. Ingleby said: 'The CAD interface is very reliable and WorkNC is tolerant of small imperfections in the model, saving the considerable amount of time it can take to repair these.

'Once machining has been completed, we inspect the part with a touch probe and compare it with the original model,' he added. Having these facilities in house enables Gordon Murray Design to ensure the confidentiality of the project and produce new prototypes within one or two days. Ingleby said: '[WorkNC] has enabled us to compress two months' work into one week.'.