IAR Workbench 5.41 Supports Code Generation

IAR Systems has released its latest IAR Embedded Workbench for ARM. Highly optimised for code size and increased execution speed, it is said to perform up to 13 per cent better on Coremark benchmarks for Cortex-M0, compared to the previous version of IAR Embedded Workbench. The IAR Embedded Workbench 5.41 also supports code generation and debugging of ARM Cortex-R4F core with the vector-floating-point (VFP) coprocessor extension.

Devices with a VFP unit will benefit from the compiler's VFP support, making floating point operations written in C/C++ run in fewer clock cycles and further improving the performance of the compiled code. Other features of the release include the ability to set start and stop trace triggers. The instruction trace triggers can be started and stopped based on conditions such as specific code locations and data access.

This feature is supported by J-Trace for ARM and J-Trace for Cortex-M3 trace probes. The J-Trace for Cortex-M3 supports the use of the serial-wire-output (SWO) port trace. IAR Embedded Workbench provides a completely integrated development environment, including a project manager, editor, build tools and debugger.

In a continuous workflow, users can create source files and projects, build applications and debug them in a simulator or on hardware. It provides support for a range of ARM devices, hardware debug systems and RTOSs, and generates very compact and efficient code. Ready-made device configuration files, flash loaders and over 1,700 example projects are included. IAR Embedded Workbench is compatible with other ARM EABI compliant compilers and over 12 ARM cores.